Meta Runs Google TPUs in Production, Marking First External Sale of AI Chips

Seven hundred tokens per second. That is the reported speed achieved by a single user when serving the 2.8-trillion-parameter Kimi K3 model on Google’s seventh-generation Ironwood TPU, a figure that significantly outpaces the 452 tokens per second recorded on comparable Nvidia GB200 hardware. This performance gap, highlighted by recent benchmarks, underscores a developing trend in the artificial intelligence sector: Google’s custom silicon is no longer confined to its own cloud ecosystem.

The milestone was confirmed this week when Google announced that Meta, the creator of the PyTorch framework, is now running AI workloads in production on Tensor Processing Units (TPUs). This represents the first instance of Google selling its proprietary chips to an external customer. The move is driven by the release of a new, PyTorch-native version of the SGLang inference engine, along with an open-source variant of vLLM, both of which have been optimized for TPU architecture.

For years, running PyTorch models on TPUs required developers to rely on Google’s JAX framework, creating a barrier for organizations standardized on PyTorch. The new SGLang-TorchTPU and vLLM-TorchTPU engines eliminate this friction. By making the hardware a native option for PyTorch, these tools allow companies to deploy models without extensive code rewrites. Zongwei Zhou, Meta’s PyTorch-TPU lead, stated that the new stack provides Meta with "a remarkably mature, PyTorch-native serving stack," a result of a tight three-way collaboration between Meta, Google, and the SGLang team.

Meta’s decision to adopt this technology is rooted in a strategic desire to avoid reliance on a single vendor. Jana van Greunen, director of PyTorch engineering at Meta, noted that the company "cannot be constrained by a single hardware architecture." The TorchTPU initiative, co-developed with Meta’s engineering teams, allows the social media giant to deploy its PyTorch workloads directly onto Google’s hardware. This marks a significant departure from previous efforts, such as the older PyTorch/XLA bridge, which research teams used from 2020 to 2023 before contracts were reportedly canceled.

The timing of this announcement is not accidental. It came one day after Amazon revealed it was open-sourcing TorchNeuron, its own native PyTorch backend for Trainium2 and Trainium3 chips, at the same PyTorch Conference. Analysts view these parallel moves as coordinated efforts to loosen Nvidia’s software lock-in. By providing robust, native support for the industry-standard PyTorch framework, both Google and Amazon are making their alternative hardware more attractive to enterprises currently dependent on Nvidia’s CUDA ecosystem.

While the exact location of Meta’s production TPUs has not been disclosed, industry reports from last year suggested a phased approach. These reports indicated that Meta was negotiating Google Cloud TPU rentals for 2026, with hardware purchases planned for 2027. Meta subsequently signed a multi-year rental agreement, suggesting a long-term commitment to integrating Google’s silicon into its infrastructure. This financial arrangement underscores the scale of the partnership, moving beyond a pilot project to a foundational element of Meta’s AI strategy.

Performance benchmarks further validate the competitiveness of this new stack. Inferact, a startup founded by the creators of vLLM, conducted tests using 16 Ironwood chips with speculative decoding. In this configuration, the setup surpassed 700 tokens per second for the Kimi K3 model. Even without speculative decoding, the new kernels for models like Kimi K3 and Qwen 3.8 27B delivered throughput that was 1.4 to two times faster than the Nvidia GB200 baseline at small batch sizes. These metrics suggest that TPU performance is no longer just a niche alternative but a viable contender for high-throughput inference tasks.

Looking ahead, the SGLang-TorchTPU engine is slated to expand its model support, beginning with DeepSeek V4.1 Flash and Reflection Beam. RadixArk, the startup behind SGLang, aims to achieve "Day 0" TPU support for new open models by the first quarter of 2027. This means that as new models are released, they will be immediately compatible with Google’s hardware, reducing the lag time that often deters companies from adopting new silicon. The ecosystem is moving toward a state of greater parity, where software compatibility no longer dictates hardware choice.

The ripple effects of this development could be felt across the American tech sector, particularly in major hubs like California where both Google and Meta maintain significant operations. As the barrier to entry for using non-Nvidia hardware lowers, enterprise buyers may have more leverage to negotiate pricing and terms. The upcoming SGLang Summit in San Francisco in November 2026 is expected to provide further details on the roadmap. For now, the industry has witnessed a concrete shift: Google’s TPUs are officially in external production, and the duopoly of Nvidia and AMD may soon face a more fragmented and competitive landscape.

This transition highlights the evolving nature of AI infrastructure, where software frameworks are becoming as critical as the chips themselves. By aligning its hardware with the most popular open-source framework, Google has addressed a primary concern of its largest potential customers. The result is a more diverse market that benefits consumers and businesses alike through increased choice and competitive pressure. The era of default reliance on a single AI chip supplier appears to be entering a new chapter, defined by interoperability and performance parity.